• Bit Logic Instructions
) Nesting Closed
= Assign
A And
A( And with Nesting Open
AN And Not
AN( And Not with Nesting Open
FN Edge Negative
FP Edge Positive
O Or
O And before Or
O( Or with Nesting Open
ON Or Not
ON( Or Not with Nesting Open
R Reset
S Set
Comparison Instructions
Conversion Instructions
BTI BCD to Integer
BTD BCD to double integer
ITB Integer to BCD
ITD Integer to Double integer
DTB Double integer to BCD
DTR Double integer to real
Counter Instructions Function of element of Step 7 programming language that counts
Set(s) Reset (R) Count up (CU) Count Down(CD) Enable counter(FR)
Integer Math Instructions
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Add Integer Constant (16, 32 Bit) -
adds the integer constant to the contents of ACCU 1 and stores the result in ACCU 1. The instruction is executed without regard to, and without affecting, the status word bits. The contents of accumulator 2 remain unchanged for CPUs with two ACCUs. The contents of accumulator 3 are copied into accumulator 2, and the contents of accumulator 4 are copied into accumulator 3 for CPUs with four ACCUs. The contents of accumulator 4 remain unchanged.
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<16-bit integer constant>: Adds a 16-bit integer constant (in the range of -32768 to +32767) to the contents of ACCU 1-L and stores the result in ACCU 1-L. The contents of accumulator 2 remain unchanged for CPUs with two ACCUs. The contents of accumulator 3 are copied into accumulator 2, and the contents of accumulator 4 are copied into accumulator 3 for CPUs with four ACCUs. The contents of accumulator 4 remain unchanged.
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<32-bit integer constant>: Adds a 32-bit integer constant (in the range of -2,147,483,648 to 2,147,483,647) to the contents of ACCU 1 and stores the result in ACCU 1.
The contents of accumulator 2 remain unchanged for CPUs with two ACCUs. The contents of accumulator 3 are copied into accumulator 2, and the contents of accumulator 4 are copied into accumulator 3 for CPUs with four ACCUs. The contents of accumulator 4 remain unchanged. +D Add ACCU 1 and ACCU 2 as Double Integer (32-Bit) -D Subtract ACCU 1 from ACCU 2 as Double Integer (32-Bit) *D Multiply ACCU 1 and ACCU 2 as Double Integer (32-Bit) /D Divide ACCU 2 by ACCU 1 as Double Integer (32-Bit) +I Add ACCU 1 and ACCU 2 as Integer (16-Bit) -I Subtract ACCU 1 from ACCU 2 as Integer (16-Bit) *I Multiply ACCU 1 and ACCU 2 as Integer (16-Bit) /I Divide ACCU 2 by ACCU 1 as Integer (16-Bit) MOD Division Remainder Double Integer (32-Bit)
Program Control Instructions BE Block End BE (block end) terminates the program scan in the current block and causes a jump to the block that called the current block. The program scan resumes with the first instruction that follows the block call statement in the calling program.
BEC Block End Conditional If RLO = 1, then BEC (block end conditional) interrupts the program scan in the current block and causes a jump to the block that called the current block.
Example: A I 1.0 Update RLO. BEC End block if RLO = 1. L IW4 Continue here if BEC is not executed, RLO = 0. T MW10
BEU Block End Unconditional BEU (block end unconditional) terminates the program scan in the current block and causes a jump to the block that called the current block. The program scan resumes with the first instruction that follows the block call.
CALL Block Call CALL is used to call functions (FCs) or function blocks (FBs), system functions (SFCs) or system function blocks (SFBs) you created yourself or to call the standard pre-programmed blocks shipped by Siemens. The CALL instruction calls the FC and SFC or the FB and SFB that you input as an address, independent of the RLO or any other condition.
CC Conditional Call CC (conditional block call) calls a logic block if RLO=1. CC is used to call logic blocks of the FC or SFC type without parameters.
UC Unconditional Call UC (unconditional block call) calls a logic block of the FC or SFC type. UC is like the CALL instruction, except that you cannot transfer parameters with the called block.
Shift Instructions
SLD Shift Left Double Word (32-Bit) SLD : The number of shifts is specified by the address . The permissible value range is from 0 to 32. The status word bits CC 0 and OV are reset to zero if is greater than zero. If is equal to zero, then the shift instruction is regarded as a NOP operation.
SLW Shift Left Word (16-Bit) SLW : The number of shifts is specified by the address . The permissible value range is from 0 to 15. The status word bits CC 0 and OV are reset to zero if is greater than zero. If is equal to zero, then the shift instruction is regarded as a NOP operation.
SRD Shift Right Double Word (32-Bit) SRD : The number of shifts is specified by the address . The permissible value range is from 0 to 32. The status word bits CC 0 and OV are reset to 0 if is greater thnan zero.
SRW Shift Right Word (16-Bit) SRW : The number of shifts is specified by the address . The permissible value range is from 0 to 15. The status word bits CC 0 and OV are reset to 0 if is greater than zero.
Timer Instructions Start timer on following Command Pulse(SP) Extended Pulse(SE) ON Delay(SD) Retentive ON delay(SS) Off delay(SF)
Reset timer(R) Enable a timer to start(FR)
SD On-Delay Timer SD starts the addressed timer when the RLO transitions from “0” to “1”. The programmed time interval elapses as long as RLO = 1. The time is stopped if RLO transitions to “0” before the programmed time interval has expired. This timer start instruction expects the time value and the time base to be stored as a BCD number in ACCU 1-L.
SE Extended Pulse Timer SE starts the addressed timer when the RLO transitions from “0” to “1”. The programmed time interval elapses, even if the RLO transitions to “0” in the meantime. The programmed time interval is started again if RLO transitions from “0” to “1” before the programmed time has expired. This timer start command expects the time value and the time base to be stored as a BCD number in ACCU 1-L.
SF Off-Delay Timer SF starts the addressed timer when the RLO transitions from “1” to “0”. The programmed time elapses as long as RLO = 0. The time is stopped if RLO transitions to “1” before the programmed time interval has expired. This timer start command expects the time value and the time base to be stored as a BCD number in ACCU 1-L
SP Pulse Timer SP starts the addressed timer when the RLO transitions from “0” to “1”. The programmed time elapses as long as RLO = 1. The timer is stopped if RLO transitions to “0” before the programmed time interval has expired. This timer start command expects the time value and the time base to be stored as a BCD number in ACCU 1-L.
SS Retentive On-Delay Timer SS (start timer as a retentive ON timer) starts the addressed timer when the RLO transitions from “0” to “1”. The full programmed time interval elapses, even if the RLO transitions to “0” in the meantime. The programmed time interval is re-triggered (started again) if RLO transitions from “0” to “1” before the programmed time has expired. This timer start command expects the time value and the time base to be stored as a BCD number in ACCU 1-L.
R Reset Timer R stops the current timing function and clears the timer value and the time base of the addressed timer word if the RLO transitions from 0 to 1.
Word Logic Instructions
AD AND Double Word (32-Bit) AD (AND double word) combines the contents of ACCU 1 with ACCU 2 or a 32-bit constant bit by bit according to the Boolean logic operation AND. A bit in the result double word is “1” only when the corresponding bits of both double words combined in the logic operation are “1”.
AW AND Word (16-Bit) AW (AND word) combines the contents of ACCU 1-L with ACCU 2-L or a 16 bit-constant bit by bit according to the Boolean logic operation AND. A bit in the result word is “1” only when the corresponding bits of both words combined in the logic operation are “1”.
OD OR Double Word (32-Bit) OD (OR double word) combines the contents of ACCU 1 with ACCU 2 or a 32-bit constant bit by bit according to the Boolean logic operation OR. A bit in the result double word is “1” when at least one of the corresponding bits of both double words combined in the logic operation is “1”.
OW OR Word (16-Bit) OW (OR word) combines the contents of ACCU 1-L with ACCU 2-L or a 16 bit-constant bit by bit according to the Boolean logic operation OR. A bit in the result word is “1” when at least one of the corresponding bits of both words combined in the logic operation is “1”.
XOD Exclusive OR Double Word (32-Bit) XOD (XOR double word) combines the contents of ACCU 1 with ACCU 2 or a 32-bit constant bit by bit according to the Boolean logic operation XOR (Exclusive Or). A bit in the result double word is “1” when only one of the corresponding bits of both double words combined in the logic operation is “1”.
XOW Exclusive OR Word (16-Bit) XOW (XOR word) combines the contents of ACCU 1-L with ACCU 2-L or a 16 bit-constant bit by bit according to the Boolean logic operation XOR. A bit in the result word is “1” only when one of the corresponding bits of both words combined in the logic operation is “1”.
Accumulator Instructions
DEC Decrement ACCU 1-L-L INC Increment ACCU 1-L-L TAK Toggle ACCU 1 with ACCU 2