Shift registers are oriented to single data bits. A shift register can only hold so many bits, so when a new bit is put in, one must be removed. An example for shift register is shown below:
The shift register is the word ’example’, and it is 5 bits long. When A becomes true the bits all shift right to the least significant bit. When they shift a new bit is needed, and it is taken from new_bit. The bit that is shifted out, on the right hand side, is moved to the control word UL (unload) bit c.UL.
This function will not complete in a single ladder logic scan, so the control word c is used. The function is edge triggered, so A would have to turn on 5 more times before the bit just loaded from new_bit would emerge to the unload bit. When A has a positive edge the 5 bits in example will be shifted in memory.
In this case it is taking the value of bit example.0 and putting it in the control word bit c.UL. It then shifts the bits once to the right, example.0 = example.1 then example.1 = example.2 then example.2 = example.3 then example.3 = example.4. Then the input bit is put into the most significant bit example.4 = new_bit.
Stacks store integer words in a two ended buffer. There are two basic types of stacks; first-on-first-out (FIFO) and last-in-first-out (LIFO). As words are pushed on the stack it gets larger, when words are pulled off it gets smaller. When you retrieve a word from a LIFO stack you get the word that is the entry end of the stack. But, when you get a word from a FIFO stack you get the word from the exit end of the stack (it has also been there the longest).
In a FIFO stack, the parts pass through an entry gate but are stopped by the exit gate. In the LIFO stack, the parts enter the stack and lower the plate, when more parts are needed the plate is raised. In this arrangement, the order of the parts in the stack will be reversed.
<img src="/uploads/default/original/2X/7/7be257ba9f72263ebdd96b3c2dd4620e182947e5.png" width=“500” height="360"alt=“FIFO”>
The ladder logic functions are FFL to load the stack, and FFU to unload it. The first time this FFL is activated (edge triggered) it will grab the word (16 bits) from the input card word_in and store them on the stack, at stack. The next value would be stored at stack, and so on until the stack length is reached at stack.
When the FFU is activated the word at stack will be moved to the output card word_out. The values on the stack will be shifted up so that the value previously in stack moves to stack, stack moves to stack, etc. If the stack is full or empty, an a load or unload occurs the error bit will be set c.ER.
The LIFO stack commands are shown in above. As values are loaded on the stack the will be added sequentially stack, stack, stack, stack then stack. When values are unloaded they will be taken from the last loaded position, so if the stack is full the value of stack will be removed first.
A PLC sequencer uses a list of words in memory. It recalls the words one at a time and moves the words to another memory location or to outputs. When the end of the list is reached the sequencer will return to the first word and the process begins again.
SQO(start,mask,destination,control,length) - sequencer output from table to memory SQI(start,mask,source,control,length) - sequencer input from memory address to table SQL(start,source,control,length) - sequencer load to set up the sequencer parameters
The SQO instruction will retrieve words from bit memory starting at sequence. The length is 4 so the end of the list will be at sequence+4 or sequence (the total length of ’sequence’ is actually 5). The sequencer is edge triggered, and each time A becomes true the retrieve a word from the list and move it to output_lights. When the sequencer reaches the end of the list the sequencer will return to the second position in the list sequence.
The first item in the list is sequence, and it will only be sent to the output if the SQO instruction is active on the first scan of the PLC, otherwise the first word sent to the output is sequence. The mask value is 000Fh, or 0000000000001111b so only the four least significant bits will be transferred to the output, the other output bits will not be changed. The other instructions allow words to be added or removed from the sequencer list.