# Various VLSI design Software

**URL:** <https://forumautomation.com/t/various-vlsi-design-software/10884>\
**Category:** Software and Tools\
**Tags:** instrumentation\
**Created:** [February 16, 2023, 6:23pm UTC](https://forumautomation.com/t/various-vlsi-design-software/10884 "2023-02-16T18:23:55Z")\
**Posts on this page:** 1\
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**Author:** ![Sudha\_m](https://forumautomation.com/user_avatar/forumautomation.com/sudha_m/32/6731_2.png) [@Sudha\_m](https://forumautomation.com/u/Sudha_m)\
**Post date:** [February 16, 2023, 6:23pm UTC](https://forumautomation.com/t/various-vlsi-design-software/10884/1 "2023-02-16T18:23:55Z")

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Designing integrated circuits (ICs) with tens of thousands or even millions of transistors is known as VLSI (Very Large Scale Integration), and it is a challenging procedure. The VLSI design flow Chart is shown below

 ![Screen Shot 2023-02-16 at 11.48.42 PM](https://cdn.forumautomation.com/original/2X/7/7910bbb396db2307d6c3fef56f5c1f73d4165f45.png)

The process of VLSI implementation is as shown

 ![Screen Shot 2023-02-16 at 11.48.55 PM](https://cdn.forumautomation.com/original/2X/c/c654ffe55c8fb095158a4da33e209cf20768b72d.png)

Physical verification technique: DRC- Design rule check, LVS- Layout versus schematic, ERC –Electrical rule check These techniques are mandatory to check a design and its structure before manufacturing.

**VLSI Software tools** There are a variety of software tools that may be used by designers to generate and test their IC designs to help with the design process. Several well-known VLSI design software applications are: Cadence Virtuoso • A highly common software application for creating and simulating analogue and digital circuits • It offers a complete platform for simulation, layout design, and schematic capture.

Synopsys • A set of software tools for designing and testing IC designs, such as design compilers, simulators, and verification tools.

Mentor Graphics • A software program that offers a full-featured environment for creating, simulating, and checking IC designs. • It provides tools for layout design, simulation, and schematic capture.

Xilinx ISE • A programme for creating and evaluating field-programmable gate arrays (FPGAs). • For creating, simulating, and verifying FPGA designs, it comes with an entire suite of design tools.

Tanner EDA • A software tool that offers a full design and simulation environment for mixed-signal and analogue circuits. • A schematic capture tool, a layout editor, and a simulation tool are all included.

**List the coding language used in IC Design coding** • System Level Design (algorithmic level): C, MATLAB, SystemC • RTL Level Design: Verilog HDL,VHDL • Gate Level Design(Post-Synthesis): Verilog HDL , VHDL • Transistor Level Design: SPICE • Simulation and Verification of Design: Verilog HDL , VHDL , System Verilog(OOPs) • Scripting: Perl, TCL. **List the CAD Tools in IC Design** • Simulation Tools(HDL): Synopsys (VCS), Cadence (NCSIM), Mentor(ModelSim) • Synthesis: Synopsys (Design Vision), Cadence (RTL Compiler/Genus) • PNR Tools: Synopsys (IC Compiler), Cadence (SoC Encounter/Innovus) • Spice Simulation Tool: Cadence SPECTRE, Synospys HSPICE, Mentor(Eldo Spice • DRC, LVS Tools: Cadence (Assura), Mentor(Calibre),Synopsys(Hercules) • Verification Tools: Synospys (VCS),Cadence (NCSIM), Mentor • (Questa Sim / ModelSim) • Formal Verification: Synopsys(Formality/VC-Formal),Cadence(JasperGold) • Timing Analysis: Synopsys(Primetime), Cadence(EDI/Tempus) • Testing: Synopsys(DFT Compiler, TetraMax), Cadence (Modus)

VLSI design flow from the point of CAD is shown below. ![Screen Shot 2023-02-16 at 11.50.35 PM](https://cdn.forumautomation.com/original/2X/d/d5cf9ecd5ed79d40ea3de5b8751a74f38c18240e.png)